AD822 datasheet(65/88 Pages) AD

65 / 88 page

ADuC841/ADuC842/ADuC843

Rev. 0 | Page 65 of 88

UART SERIAL INTERFACE

The serial port is full-duplex, meaning it can transmit and

receive simultaneously. It is also receive-buffered, meaning it

can begin receiving a second byte before a previously received

byte has been read from the receive register. However, if the first

byte still has not been read by the time reception of the second

byte is complete, the first byte is lost. The physical interface to

the serial data network is via Pins RxD(P3.0) and TxD(P3.1),

while the SFR interface to the UART is comprised of SBUF and

SCON, as described below.

SBUF

Both the serial port receive and transmit registers are accessed

through the SBUF SFR (SFR address = 99H). Writing to SBUF

loads the transmit register, and reading SBUF accesses a

physically separate receive register.

SCON UART

Serial Port Control Register

SFR Address

98H

Power-On Default

00H

Bit Addressable

Yes

Table 32. SCON SFR Bit Designations

Bit No.

Name

Description

SM0

UART Serial Mode Select Bits.

These bits select the serial port operating mode as follows:

SM0

SM1

Selected Operating Mode.

Mode 0: Shift Register, fixed baud rate (Core_Clk/2).

Mode 1: 8-bit UART, variable baud rate.

Mode 2: 9-bit UART, fixed baud rate (Core_Clk/32) or (Core_Clk/16).

SM1

Mode 3: 9-bit UART, variable baud rate.

SM2

Multiprocessor Communication Enable Bit.

Enables multiprocessor communication in Modes 2 and 3.

In Mode 0, SM2 must be cleared.

In Mode 1, if SM2 is set, RI is not activated if a valid stop bit was not received. If SM2 is cleared, RI is set as soon as the

byte of data has been received.

In Modes 2 or 3, if SM2 is set, RI is not activated if the received 9th data bit in RB8 is 0.

If SM2 is cleared, RI is set as soon as the byte of data has been received.

REN

Serial Port Receive Enable Bit.

Set by user software to enable serial port reception.

Cleared by user software to disable serial port reception.

TB8

Serial Port Transmit (Bit 9).

The data loaded into TB8 is the 9th data bit transmitted in Modes 2 and 3.

RB8

Serial Port Receiver Bit 9.

The 9th data bit received in Modes 2 and 3 is latched into RB8. For Mode 1, the stop bit is latched into RB8.

Serial Port Transmit Interrupt Flag.

Set by hardware at the end of the 8th bit in Mode 0, or at the beginning of the stop bit in Modes 1, 2, and 3.

TI must be cleared by user software.

Serial Port Receive Interrupt Flag.

Set by hardware at the end of the 8th bit in Mode 0, or halfway through the stop bit in Modes 1, 2, and 3.

RI must be cleared by software.

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