DSPIC33FJ32GP302THSLASHSP datasheet(227/403 Pages) MICROCHIP

Part #	DSPIC33FJ32GP302TH/SP

Description	High-Performance, 16-bit Digital Signal Controllers

PDF	403 Pages

Scroll/Zoom	100%

Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

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227 / 403 page

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 227

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

CiFCTRL: ECAN™ FIFO CONTROL REGISTER

R/W-0

U-0

DMABS<2:0>

—

bit 15

bit 8

U-0

R/W-0

—

FSA<4:0>

bit 7

bit 0

Legend:

C = Writable bit, but only ‘0’ can be written to clear the bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-13

DMABS<2:0>: DMA Buffer Size bits

111

= Reserved

110

= 32 buffers in DMA RAM

101

= 24 buffers in DMA RAM

100

= 16 buffers in DMA RAM

011

= 12 buffers in DMA RAM

010

= 8 buffers in DMA RAM

001

= 6 buffers in DMA RAM

000

= 4 buffers in DMA RAM

bit 12-5

Unimplemented: Read as ‘0’

bit 4-0

FSA<4:0>: FIFO Area Starts with Buffer bits

11111

= Read buffer RB31

11110

= Read buffer RB30

•

00001

= Tx/Rx buffer TRB1

00000

= Tx/Rx buffer TRB0

DSPIC33FJ32GP302TH/SP Datasheet(PDF) 227 Page - Microchip Technology

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