DSPIC33FJ32GP302THSLASHSP datasheet(229/403 Pages) MICROCHIP

229 / 403 page

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 229

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

CiINTF: ECAN™ INTERRUPT FLAG REGISTER

U-0

R-0

—

TXBO

TXBP

RXBP

TXWAR

RXWAR

EWARN

bit 15

bit 8

R/C-0

U-0

R/C-0

IVRIF

WAKIF

ERRIF

—

FIFOIF

RBOVIF

RBIF

TBIF

bit 7

bit 0

Legend:

C = Writable bit, but only ‘0’ can be written to clear the bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-14

Unimplemented: Read as ‘0’

bit 13

TXBO: Transmitter in Error State Bus Off bit

= Transmitter is in Bus Off state

= Transmitter is not in Bus Off state

bit 12

TXBP: Transmitter in Error State Bus Passive bit

= Transmitter is in Bus Passive state

= Transmitter is not in Bus Passive state

bit 11

RXBP: Receiver in Error State Bus Passive bit

= Receiver is in Bus Passive state

= Receiver is not in Bus Passive state

bit 10

TXWAR: Transmitter in Error State Warning bit

= Transmitter is in Error Warning state

= Transmitter is not in Error Warning state

bit 9

RXWAR: Receiver in Error State Warning bit

= Receiver is in Error Warning state

= Receiver is not in Error Warning state

bit 8

EWARN: Transmitter or Receiver in Error State Warning bit

= Transmitter or Receiver is in Error State Warning state

= Transmitter or Receiver is not in Error State Warning state

bit 7

IVRIF: Invalid Message Received Interrupt Flag bit

= Interrupt Request has occurred