DSPIC33FJ32GP302THSLASHSP datasheet(253/403 Pages) MICROCHIP

253 / 403 page

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 253

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

21.0

10-BIT/12-BIT ANALOG-TO-

DIGITAL CONVERTER (ADC)

The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/

X04, and dsPIC33FJ128GPX02/X04 devices have up

to 13 ADC input channels.

The AD12B bit (AD1CON1<10>) allows each of the

ADC modules to be configured by the user as either a

10-bit, 4-sample/hold ADC (default configuration) or a

12-bit, 1-sample/hold ADC.

21.1

Key Features

The 10-bit ADC configuration has the following key

features:

• Successive Approximation (SAR) conversion

• Conversion speeds of up to 1.1 Msps

• Up to 13 analog input pins

• External voltage reference input pins

• Simultaneous sampling of up to four analog input

pins

• Automatic Channel Scan mode

• Selectable conversion trigger source

• Selectable Buffer Fill modes

• Four result alignment options (signed/unsigned,

fractional/integer)

• Operation during CPU Sleep and Idle modes

The 12-bit ADC configuration supports all the above

features, except:

• In the 12-bit configuration, conversion speeds of

up to 500 ksps are supported

• There is only one sample/hold amplifier in the

12-bit configuration, so simultaneous sampling of

multiple channels is not supported.

Depending on the particular device pinout, the ADC

can have up to 13 analog input pins, designated AN0

through AN12. In addition, there are two analog input

pins for external voltage reference connections. These

voltage reference inputs can be shared with other ana-

log input pins. The actual number of analog input pins

and external voltage reference input configuration

depends on the specific device.

Block diagrams of the ADC module are shown in

Figure 21-1 and Figure 21-2.

21.2

ADC Initialization

The following configuration steps should be performed.

Configure the ADC module:

Select

port

pins

analog

inputs

(AD1PCFGH<15:0> or AD1PCFGL<15:0>)

Select voltage reference source to match

expected

range

analog

inputs

(AD1CON2<15:13>)

Select the analog conversion clock to

match desired data rate with processor

clock (AD1CON3<7:0>)

Determine how many S/H channels are

used

(AD1CON2<9:8>

and

AD1PCFGH<15:0> or AD1PCFGL<15:0>)

Select the appropriate sample/conversion

sequence

(AD1CON1<7:5>

and

AD1CON3<12:8>)

Select

how

conversion

results

are

presented in the buffer (AD1CON1<9:8>)

Turn on ADC module (AD1CON1<15>)

Configure ADC interrupt (if required):

Clear the AD1IF bit

Select ADC interrupt priority

21.3

ADC and DMA

If more than one conversion result needs to be buffered

before triggering an interrupt, DMA data transfers can

be used. ADC1 can trigger a DMA data transfer. If

ADC1 is selected as the DMA IRQ source, a DMA

transfer occurs when the AD1IF bit gets set as a result

of an ADC1 sample conversion sequence.

The SMPI<3:0> bits (AD1CON2<5:2>) are used to

select how often the DMA RAM buffer pointer is

incremented.

The ADDMABM bit (AD1CON1<12>) determines how

the conversion results are filled in the DMA RAM buffer

area being used for ADC. If this bit is set, DMA buffers

are written in the order of conversion. The module

provides an address to the DMA channel that is the

same as the address used for the non-DMA stand-

alone buffer. If the ADDMABM bit is cleared, then DMA

buffers are written in Scatter/Gather mode. The module

provides a scatter/gather address to the DMA channel,

based on the index of the analog input and the size of

the DMA buffer.

Note 1: This data sheet summarizes the features

the

dsPIC33FJ32GP302/304,

dsPIC33FJ64GPX02/X04,

and

dsPIC33FJ128GPX02/X04

families

devices. It is not intended to be a compre-

hensive reference source. To comple-

ment the information in this data sheet,

refer to “Section 16. Analog-to-Digital

Converter (ADC)” (DS70183) of the

“dsPIC33F/PIC24H

Family

Reference

Manual”, which is available from the

Microchip website (www.microchip.com).

2: Some registers

and

associated bits

described in this section may not be avail-

able on all devices. Refer to Section 4.0

“Memory Organization” in this data

sheet for device-specific register and bit

information.

Note:

The ADC module needs to be disabled

before modifying the AD12B bit.

DSPIC33FJ32GP302TH/SP Datasheet(PDF) 253 Page - Microchip Technology

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