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DSPIC33FJ32GP302TH/SP Datasheet(PDF) 255 Page - Microchip Technology |
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DSPIC33FJ32GP302TH/SP Datasheet(HTML) 255 Page - Microchip Technology |
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255 / 403 page  2009 Microchip Technology Inc. Preliminary DS70292D-page 255 dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 FIGURE 21-2: ADC1 MODULE BLOCK DIAGRAM FOR dsPIC33FJ32GP302, dsPIC33FJ64GP202/802 AND dsPIC33FJ128GP202/802 DEVICES SAR ADC S/H0 S/H1 AN0 AN12 AN1 VREFL CH0SB<4:0> CH0NA CH0NB + - AN0 AN3 CH123SA AN9 VREFL CH123SB CH123NA CH123NB + - S/H2 AN1 AN4 CH123SA AN10 VREFL CH123SB CH123NA CH123NB + - S/H3 AN2 AN5 CH123SA AN11 VREFL CH123SB CH123NA CH123NB + - CH1(2) CH0 CH2(2) CH3(2) CH0SA<4:0> CHANNEL SCAN CSCNA Alternate Note 1: VREF+, VREF- inputs can be multiplexed with other analog inputs. 2: Channels 1, 2 and 3 are not applicable for the 12-bit mode of operation. Input Selection VREFH VREFL ADC1BUF0 AVDD AVSS VREFL-(1) VREFL+(1) VCFG<2:0> |
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