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DSPIC33FJ32GP302TH/SP Datasheet(PDF) 287 Page - Microchip Technology |
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DSPIC33FJ32GP302TH/SP Datasheet(HTML) 287 Page - Microchip Technology |
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287 / 403 page ![]() 2009 Microchip Technology Inc. Preliminary DS70292D-page 287 dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 25.0 PROGRAMMABLE CYCLIC REDUNDANCY CHECK (CRC) GENERATOR The programmable CRC generator offers the following features: • User-programmable polynomial CRC equation • Interrupt output • Data FIFO 25.1 Overview The module implements a software configurable CRC generator. The terms of the polynomial and its length can be programmed using the CRCXOR (X<15:1>) bits and the CRCCON (PLEN<3:0>) bits, respectively. EQUATION 25-1: CRC EQUATION To program this polynomial into the CRC generator, the CRC register bits should be set as shown in Table 25-1. TABLE 25-1: EXAMPLE CRC SETUP For the value of X<15:1>, the 12th bit and the 5th bit are set to ‘1’, as required by the CRC equation. The 0th bit required by the CRC equation is always XORed. For a 16-bit polynomial, the 16th bit is also always assumed to be XORed; therefore, the X<15:1> bits do not have the 0th bit or the 16th bit. The topology of a standard CRC generator is shown in Figure 25-2. FIGURE 25-1: CRC SHIFTER DETAILS Note 1: This data sheet summarizes the features of the dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, and dsPIC33FJ128GPX02/X04 families of devices. It is not intended to be a compre- hensive reference source. To comple- ment the information in this data sheet, refer to “Section 36. Programmable Cyclic Redundancy Check (CRC)” (DS70298) of the “dsPIC33F/PIC24H Family Reference Manual”, which is avail- able from the Microchip website (www.microchip.com). 2: Some registers and associated bits described in this section may not be avail- able on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. Bit Name Bit Value PLEN<3:0> 1111 X<15:1> 000100000010000 x 16 x 12 x 5 1 ++ + IN OUT BIT 0 0 1 p_clk X1 IN OUT BIT 1 0 1 p_clk X2 IN OUT BIT 2 0 1 p_clk X3 IN OUT BIT 15 0 1 p_clk X15 XOR DOUT 01 2 15 PLEN<3:0> Hold Hold Hold Hold CRC Read Bus CRC Write Bus CRC Shift Register |
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