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DSPIC33FJ32GP302TH/SP Datasheet(PDF) 141 Page - Microchip Technology |
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DSPIC33FJ32GP302TH/SP Datasheet(HTML) 141 Page - Microchip Technology |
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141 / 403 page ![]() 2009 Microchip Technology Inc. Preliminary DS70292D-page 141 dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 9.0 OSCILLATOR CONFIGURATION The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/ X04, and dsPIC33FJ128GPX02/X04 oscillator system provides: • External and internal oscillator options as clock sources • An on-chip Phase-Locked Loop (PLL) to scale the internal operating frequency to the required sys- tem clock frequency • An internal FRC oscillator that can also be used with the PLL, thereby allowing full-speed operation without any external clock generation hardware • Clock switching between various clock sources • Programmable clock postscaler for system power savings • A Fail-Safe Clock Monitor (FSCM) that detects clock failure and takes fail-safe measures • A Clock Control register (OSCCON) • Non-volatile Configuration bits for main oscillator selection • An auxiliary crystal oscillator for Audio DAC A simplified diagram of the oscillator system is shown in Figure 9-1. FIGURE 9-1: dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/ X04 OSCILLATOR SYSTEM DIAGRAM Note 1: This data sheet summarizes the features of the dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, and dsPIC33FJ128GPX02/X04 families of devices. It is not intended to be a compre- hensive reference source. To comple- ment the information in this data sheet, refer to “Section 39. Oscillator (Part III)” (DS70216) of the “dsPIC33F/PIC24H Family Reference Manual”, which is avail- able from the Microchip website (www.microchip.com). 2: Some registers and associated bits described in this section may not be avail- able on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. Secondary Oscillator LPOSCEN SOSCO SOSCI Timer1 XTPLL, HSPLL, XT, HS, EC FRCDIV<2:0> WDT, PWRT, FSCM FRCDIVN SOSC FRCDIV16 ECPLL, FRCPLL NOSC<2:0> FNOSC<2:0> Reset FRC Oscillator LPRC Oscillator DOZE<2:0> S3 S1 S2 S1/S3 S7 S6 FRC LPRC S0 S5 S4 ÷16 Clock Switch S7 Clock Fail ÷ 2 TUN<5:0> PLL FCY FOSC Note 1: See Figure 9-2 for PLL details. 2: If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 M must be connected. ÷N ACLK POSCCLK Auxiliary Oscillator SELACK APSTSCLR<2:0> DAC FVCO(1) AOSCCLK AOSCMD<1:0> ASRCSEL FVCO(1) POSCCLK OSC2 OSC1 Primary Oscillator R(2) POSCMD<1:0> FP |
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