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MPC8358ECVRADDDA Datasheet(PDF) 38 Page - Freescale Semiconductor, Inc

Part # MPC8358ECVRADDDA
Description  MPC8360E/MPC8358E PowerQUICC II Pro Processor
PDF  102 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8358ECVRADDDA Datasheet(HTML) 38 Page - Freescale Semiconductor, Inc

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MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
38
Freescale Semiconductor
Local Bus DC Electrical Characteristics
8.3.3
IEEE 1588 Timer AC Specifications
This table provides the IEEE 1588 timer AC specifications.
9
Local Bus
This section describes the DC and AC electrical specifications for the local bus interface of the MPC8360E/58E.
9.1
Local Bus DC Electrical Characteristics
This table provides the DC electrical characteristics for the local bus interface.
9.2
Local Bus AC Electrical Specifications
This table describes the general timing parameters of the local bus interface of the device.
Table 38. IEEE 1588 Timer AC Specifications
Parameter
Symbol
Min
Max
Unit
Notes
Timer clock frequency
tTMRCK
070
MHz
1
Input setup to timer clock
tTMRCKS
——
—
2, 3
Input hold from timer clock
tTMRCKH
——
—
2, 3
Output clock to output valid
tGCLKNV
06
ns
—
Timer alarm to output valid
tTMRAL
——
—
2
Notes:
1. The timer can operate on rtc_clock or tmr_clock. These clocks get muxed and any one of them can be selected. The
minimum and maximum requirement for both rtc_clock and tmr_clock are the same.
2. These are asynchronous signals.
3. Inputs need to be stable at least one TMR clock.
Table 39. Local Bus DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
High-level output voltage, IOH = –100 μAVOH
OVDD – 0.4
—
V
Low-level output voltage, IOL = 100 μAVOL
—0.2
V
Input current
IIN
—±10
μA
Table 40. Local Bus General Timing Parameters—DLL Enabled
Parameter
Symbol1
Min
Max
Unit
Notes
Local bus cycle time
tLBK
7.5
—
ns
2
Input setup to local bus clock (except LUPWAIT)
tLBIVKH1
1.7
—
ns
3, 4
LUPWAIT input setup to local bus clock
tLBIVKH2
1.9
—
ns
3, 4
Input hold from local bus clock (except LUPWAIT)
tLBIXKH1
1.0
—
ns
3, 4



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