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DSPIC30F5015 Datasheet(PDF) 140 Page - Microchip Technology |
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DSPIC30F5015 Datasheet(HTML) 140 Page - Microchip Technology |
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140 / 234 page  dsPIC30F5015/5016 DS70149E-page 140 © 2011 Microchip Technology Inc. FIGURE 20-1: 10-BIT HIGH-SPEED A/D FUNCTIONAL BLOCK DIAGRAM S/H + - 10-bit Result Conversion Logic VREF+(1) AVSS AVDD ADC 16-word, 10-bit Dual Port Buffer AN12 AN0 AN5 AN7 AN9 AN13 AN14 AN15 AN12 AN1 AN2 AN3 AN4 AN6 AN8 AN10 AN11 AN13 AN14 AN15 AN8 AN9 AN10 AN11 AN4 AN5 AN6 AN7 AN0 AN1 AN2 AN3 CH1 CH2 CH3 CH0 AN5 AN2 AN11 AN8 AN4 AN1 AN10 AN7 AN3 AN0 AN9 AN6 AN1 VREF-(2) Sample/Sequence Control Sample CH1,CH2, CH3,CH0 Input MUX Control Input Switches S/H + - S/H + - S/H + - Note 1: VREF+ is multiplexed with AN0 in the dsPIC30F5015 variant. 2: VREF- is multiplexed with AN1 in the dsPIC30F5015 variant. |
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