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TMS320DM6467CCUT6 Datasheet(PDF) 39 Page - Texas Instruments |
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TMS320DM6467CCUT6 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 355 page  TMS320DM6467 www.ti.com SPRS403H – DECEMBER 2007 – REVISED JUNE 2012 Table 3-9. Asynchronous External Memory Interface (EMIFA) Terminal Functions (continued) SIGNAL TYPE(1) OTHER(2) (3) DESCRIPTION NAME NO. PCI_STOP/ IPU This pin is multiplexed between PCI, HPI, and EMIFA. HCNTL0/ D5 I/O/Z DVDD33 In EMIFA mode, this pin is the write enable output EM_WE (O/Z). EM_WE This pin is multiplexed between PCI, HPI, and EMIFA. PCI_CBE2/ IPU In EMIFA mode, this pin is Chip Select 2 output EM_CS2 (O/Z). This is the chip HDS2/ C4 I/O/Z DVDD33 select used for EMIFA boot modes. Asynchronous memories (i.e., NOR Flash) or EM_CS2 NAND flash. PCI_CBE3/ This pin is multiplexed between PCI, HPI, and EMIFA. IPU HR/W A5 I/O/Z In EMIFA mode, this pin is Chip Select 3 output EM_CS3 (O/Z). Asynchronous DVDD33 EM_CS3 memories (i.e., NOR Flash). PCI_AD15/ IPD E5 I/O/Z HD15/EM_D15 DVDD33 PCI_AD14/ IPD C1 I/O/Z HD14 /EM_D14 DVDD33 PCI_AD13/ IPD E4 I/O/Z HD13/EM_D13 DVDD33 PCI_AD12/ IPD D3 I/O/Z HD12/EM_D12 DVDD33 PCI_AD11/ IPD E3 I/O/Z HD11/EM_D11 DVDD33 PCI_AD10/ IPD D2 I/O/Z HD10/EM_D10 DVDD33 PCI_AD9/ IPD F5 I/O/Z HD9/EM_D9 DVDD33 These pins are multiplexed between PCI, HPI, and EMIFA. PCI_AD8/ IPD D1 I/O/Z For EMIFA mode, these pins are the 16-bit bidirectional data bus (EM_D[15:0]) HD8/EM_D8 DVDD33 [I/O/Z]. PCI_AD7/ IPD When EMIFA is configured for an 8-bit asynchronous memory, only EM_D[7:0] E2 I/O/Z HD7/EM_D7 DVDD33 pins are used. PCI_AD6/ IPD F3 I/O/Z HD6/EM_D6 DVDD33 PCI_AD5/ IPD E1 I/O/Z HD5/EM_D5 DVDD33 PCI_AD4/ IPD G5 I/O/Z HD4/EM_D4 DVDD33 PCI_AD3/ IPD F2 I/O/Z HD3/EM_D3 DVDD33 PCI_AD2/ IPD G4 I/O/Z HD2/EM_D2 DVDD33 PCI_AD1/ IPD F1 I/O/Z HD1/EM_D1 DVDD33 PCI_AD0/ IPD G3 I/O/Z HD0/EM_D0 DVDD33 Copyright © 2007–2012, Texas Instruments Incorporated Device Overview 39 Submit Documentation Feedback Product Folder Link(s): TMS320DM6467 |
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