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LTC1778 Datasheet(PDF) 17 Page - Linear Technology |
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LTC1778 Datasheet(HTML) 17 Page - Linear Technology |
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17 / 24 page ![]() 17 LTC1778/LTC1778-1 1778fb APPLICATIO S I FOR ATIO Other losses, including COUT ESR loss, Schottky diode D1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. When making adjustments to improve efficiency, the input current is the best indicator of changes in efficiency. If you make a change and the input current decreases, then the efficiency has increased. If there is no change in input current, then there is no change in efficiency. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ∆ILOAD (ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability prob- lem. The ITH pin external components shown in Figure 9 will provide adequate compensation for most applica- tions. For a detailed explanation of switching control loop theory see Application Note 76. Design Example As a design example, take a supply with the following specifications: VIN = 7V to 28V (15V nominal), VOUT = 2.5V ±5%, IOUT(MAX) = 10A, f = 250kHz. First, calculate the timing resistor with VON = VOUT: R V V kHz pF M ON = ()( )( ) = Ω 25 0 7 250 10 142 . . . and choose the inductor for about 40% ripple current at the maximum VIN: L V kHz A V V H = ()( )( ) − ⎛ ⎝ ⎜ ⎞ ⎠ ⎟ =µ 25 250 0 4 10 1 25 28 23 . . . . Selecting a standard value of 1.8µH results in a maximum ripple current of: ∆ = () µ () ⎛ ⎝ ⎜ ⎞ ⎠ ⎟ = I V kHz H V V A L 25 250 1 8 1 25 28 51 . . – . . Next, choose the synchronous MOSFET switch. Choosing a Si4874 (RDS(ON) = 0.0083Ω (NOM) 0.010Ω (MAX), θJA = 40°C/W) yields a nominal sense voltage of: VSNS(NOM) = (10A)(1.3)(0.0083Ω) = 108mV Tying VRNG to 1.1V will set the current sense voltage range for a nominal value of 110mV with current limit occurring at 146mV. To check if the current limit is acceptable, assume a junction temperature of about 80°C above a 70°C ambient with ρ150°C = 1.5: I mV AA LIMIT ≥ () Ω () + () = 146 15 0010 1 2 51 12 .. . and double check the assumed TJ in the MOSFET: P VV V AW BOT = () ( ) Ω () = 28 2 5 28 12 15 0 010 197 2 –. .. . TJ = 70°C + (1.97W)(40°C/W) = 149°C Because the top MOSFET is on for such a short time, an Si4884 RDS(ON)(MAX) = 0.0165Ω, CRSS = 100pF, θJA = 40°C/W will be sufficient. Checking its power dissipation at current limit with ρ100°C = 1.4: P V V A VApF kHz WW W TOP = () ( ) Ω ()+ ()( ) ( )( )( ) =+= 25 28 12 1 4 0 0165 1 7 28 12 100 250 030 0 40 07 2 2 . .. . .. . TJ = 70°C + (0.7W)(40°C/W) = 98°C The junction temperatures will be significantly less at nominal current, but this analysis shows that careful attention to heat sinking will be necessary in this circuit. |
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