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AD9726-EBZ Datasheet(PDF) 6 Page - Analog Devices

Part # AD9726-EBZ
Description  16-Bit, 400 MSPS Digital-to-Analog Converter
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9726-EBZ Datasheet(HTML) 6 Page - Analog Devices

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AD9726
Rev. B | Page 6 of 24
Parameter
Min
Typ
Max
Unit
SERIAL PORT INTERFACE
SCLK Frequency (fSCLK)
15
MHz
SCLK Rise/Fall Time
1
ms
SCLK Pulse Width High (tCPWH)
30
ns
SCLK Pulse Width Low (tCPWL)
30
ns
SCLK Setup Time (tCSU)
30
ns
SDIO Setup Time (tDSU)
30
ns
SDIO Hold Time (tDH)
0
ns
SDIO/SDO Valid Time (tDV)
30
ns
RESET PULSE WIDTH
1.5
ns
TIMING DIAGRAMS
DAC CLOCK
DATACLOCK OUTPUT
DATACLOCK INPUT
DATA BUS
tDCPD-DDR
tDSU-DDR
tDH-DDR
Figure 2. DDR Timing Diagram
DAC CLOCK
DATACLOCK OUTPUT
DATACLOCK INPUT
DATA BUS
tDCPD-SDR
tDSU-SDR
tDH-SDR
Figure 3. SDR Timing Diagram
DB0 TO DB15
CLK+/CLK–
IOUTA OR IOUTB
tPD-BYPASS
tDSU-BYPASS
tDH-BYPASS
Figure 4. Data Synchronization Bypass Timing Diagram



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