IO96PDB2V1 datasheet(57/242 Pages) MICROSEMI

Part #	IO96PDB2V1

Description	ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology

PDF	242 Pages

Scroll/Zoom	100%

Manufacturer	MICROSEMI [Microsemi Corporation]

Direct Link	http://www.microsemi.com

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ProASIC3L Low Power Flash FPGAs

Revision 13

2-41

Table 2-44 • Duration of Short Circuit Event before Failure

Temperature

Time before Failure

–40°C

> 20 years

0°C

> 20 years

25°C

> 20 years

70°C

5 years

85°C

2 years

100°C

6 months

Table 2-45 • I/O Input Rise Time, Fall Time, and Related I/O Reliability

Input Buffer

Input Rise/Fall Time (min.)

Input Rise/Fall Time (max.)

Reliability

LVTTL/LVCMOS

No requirement

10 ns *

20 years (110°C)

LVDS/B-LVDS/

M-LVDS/LVPECL

No requirement

10 ns *

10 years (100°C)

Note: *The maximum input rise/fall time is related to the noise induced into the input buffer trace. If the noise is low,

then the rise time and fall time of input buffers can be increased beyond the maximum value. The longer the

rise/fall times, the more susceptible the input signal is to the board noise. Microsemi recommends signal

integrity evaluation/characterization of the system to ensure that there is no excessive noise coupling into input

signals.

IO96PDB2V1 Datasheet(PDF) 57 Page - Microsemi Corporation