TTP-C2NF Communication Controller – Data Sheet

AS8202NF

Rev. 1.7, Copyright 2000-2007, austriamicrosystems AG and TTChip Entwicklungsgesellschaft mbH. All rights reserved.

6

4 . P i n As s i g n m e n t

VSS

VDD

VSS

XIN0

nc

XOUT0

TXD0

VDDPLL

CTS0

RXER0

TXCLK0

RXCLK0

RXD0

RXDV0

VDD

TXD1

VSS

CTS1

RXER1

TXCLK1

RXCLK1

RXD1

RXDV1

D7

D5

D6

D4

D2

D3

D1

D0

VDD

A10

A11

A9

A7

A8

A6

VSS

A5

1

20

21

40

41

60

61

80

AS8202NF

TTP

Communications

Controller

(TOP VIEW)

Figure 2. LQFP 80 Pin Package and Pin Assignment

5 . P i n D e s c r i p t i o n

Pin

Name

Dir

Function

12,29,49,59,74

VDD

P

Positive Power Supply

13,30,41,50,60,75

VSS

P

Negative Power Supply

70

VDDBG

P

Positive Power Supply for Bus Guardian (connect to VDD)

73

VSSBG

P

Negative Power Supply for Bus Guardian (connect to VSS)

4

VDDPLL

P

Positive Power Supply for Main Clock PLL (connect to VDD)

80

VSSPLL

P

Negative Power Supply for Main Clock PLL (connect to VSS)

21

RAM_CLK_TESTSE

RAM_CLK when STEST='0' and USE_RAM_CLK='1', else Test Input, connect to

VSS if not used

22

STEST

Test Input, connect to VSS

24

FTEST

Test Input, connect to VSS

25

FIDIS

Test Input, connect to VSS

61

TTEST

Test Input, connect to VDD

34

USE_RAM_CLK

RAM_CLK Pin Enable, connect to VSS if not used

2

XIN0

A

Main Clock: Analog CMOS Oscillator Input, use as input when providing external

clock

3

XOUT0

A

Main Clock: Analog CMOS Oscillator Ouptut, leave open when providing external

clock

23

PLLOFF

Main Clock PLL Disable Pin, connect to VSS when providing 10 MHz crystal for

enabling the internal PLL

72

XIN1

A

Bus Guardian Clock: Analog CMOS Oscillator Input, use as input when providing

external clock

71

XOUT1

A

Bus Guardian Clock: Analog CMOS Oscillator Output, leave open when providing

external clock

26

RESETB

Main Reset Input, active low

5

TXD0

TTP Bus Channel 0: Transmit Data

6

CTS0

TTP Bus Channel 0: Transmit Enable

11

RXD0

TTP Bus Channel 0: Receive Data

7

TXCLK0

TTP Bus Channel 0: Transmit Clock (MII mode)