TTP-C2NF Communication Controller – Data Sheet

AS8202NF

Rev. 1.7, Copyright 2000-2007, austriamicrosystems AG and TTChip Entwicklungsgesellschaft mbH. All rights reserved.

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2 . B e n e f i ts

The AS8202NF provides support for fault-tolerant, high-speed bus systems in a single device.

The communication controller is qualified for the full temperature range required for automotive

applications and is certifiable according to RTCA standards. It offers superior reliability and

supports data transfer rates of 25 Mbit/s with MII and up to 5 Mbit/s with MFM/Manchester. The

AS8202NF is the first TTP controller to support both MFM and Manchester coding. Manchester

coding is important for DC-free data transmission, which allows the use of transformers in the

data stream. The AS8202NF is pin-compatible with its predecessor, the AS8202.

3 . K e y F e a t u r e s

• Dedicated controller supporting TTP (time-triggered protocol class C)

• Suited for dependable distributed real-time systems with guaranteed response time

• Application fields: automotive (by-wire braking, steering, vehicle dynamics control, drive

train control), aerospace (aircraft electronic systems), industrial systems, railway systems

• Asynchronous data rate up to 5 Mbit/s (MFM / Manchester)

• Synchronous data rate 5 to 25 Mbit/s

• Bus interface (speed, encoding) for each channel selectable independently

• 40 MHz main clock with support for 10 MHz crystal, 10 MHz oscillator or 40 MHz oscillator

• 16 MHz bus guardian clock with support for 16 MHz crystal or 16 MHz oscillator

• Single power supply 3.3V, 0.35µm CMOS process

• Full automotive temperature range (-40°C to 125°C)

• 16k x 16 SRAM for message, status, control area (communication network interface) and

for scheduling information (MEDL)

• 4k x 16 (plus parity) instruction code RAM for protocol execution code

• Data sheet conforms to protocol revision 2.03

• 16k x 16 instruction code ROM containing startup execution code and deprecated protocol

code revision 1.00

• 16 Bit non-multiplexed asynchronous host CPU interface

• 16 Bit RISC architecture

• 80 pin LQFP80 Package