RL78G13 datasheet(6/46 Pages) RENESAS

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RL78/G13

Serial Array Unit (UART Communication)

R01AN0459EJ0200

Rev. 2.00

Page 6 of 43

2014.03.24

Description of the Hardware

4.1

Hardware Configuration Example

Figure 4.1 shows an example of hardware configuration that is used for this application note.

Figure 4.1

Hardware Configuration

Caution: 1. The purpose of this circuit is only to provide the connection outline and the circuit is simplified

accordingly. When designing and implementing an actual circuit, provide proper pin treatment and make

sure that the hardware's electrical specifications are met (connect the input-only ports separately to VDD

or VSS via a resistor).

2. Connect any pins whose name begins with EVSS to VSS and any pins whose name begins with EVDD to

VDD, respectively.

3. VDD must be held at not lower than the reset release voltage (VLVI) that is specified as LVD.

4.2

List of Pins to be Used

Table 4.1 lists the pins to be used and their function.

Table 4.1

Pins to be Used and their Functions

Pin Name

I/O

Description

P12/SO00/TxD0/TOOLTxD

Output

Data transmission pin

P11/SI00/RxD0/TOOLRxD/SDA00

Input

Data reception pin

RESET

VDD

RL78/G13

EVDD

VDD

EVSS

VSS

REGC

RxD0

TxD0

Device on the

opposite side

Transmission

Reception

P40/TOOL0

For on-chip debugger

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