RL78G13 datasheet(7/46 Pages) RENESAS

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RL78/G13

Serial Array Unit (UART Communication)

R01AN0459EJ0200

Rev. 2.00

Page 7 of 43

2014.03.24

Description of the Software

5.1

Operation Outline

This sample code transmits, to the device on the opposite side, the data corresponding to that received from the device.

If an error occurs, it transmits to the device the data corresponding to the error. Tables 5.1 and 5.2 show the

correspondence between transmit data and receive data.

Table 5.1

Correspondence between Receive Data and Transmit Data

Receive Data

Response (Transmit) Data

T (54H)

O (4FH), K (4BH), ”CR” (0DH), ”LF” (0AH)

t (74H)

o (6FH), k (6BH), ”CR” (0DH), ”LF” (0AH)

Other than above

U (55H), C (43H), ”CR” (0DH), ”LF” (0AH)

Table 5.2

Correspondence between Error and Transmit Data

Error

Response (Transmit) Data

Parity error

P (50H), E (45H), ”CR” (0DH), ”LF” (0AH)

Framing error

F (46H), E (45H), ”CR” (0DH), ”LF” (0AH)

Overrun error

O (4FH), E (45H), ”CR” (0DH), ”LF” (0AH)

(1) Perform initial setting of UART.



Use SAU0 channels 0 and 1 as UART.



Use the P12/TxD0 pin and the P11/RxD0 pin for data output and data input, respectively.



The data length is 8 bits.



Set the data transfer direction to LSB first.



Use even parity as the parity setting.



Set the receive data level to standard.



Set the transfer rate to 9600 bps.



Use reception end interrupt (INTSR0), transmission end interrupt (INTST0), and error interrupt (INTSRE0).



Set the interrupt priority orders of INTSR0, INTST0, and INTSRE0 to low priority.

(2) After the system is made to enter a UART communication wait state by using the serial channel start register, a

HALT instruction is executed. Processing is performed in response to reception end interrupt (INTSR0) and error

interrupt (INTSRE0).



When an INTSR0 occurs, the received data is taken in and the data corresponding to the received data is

transmitted. When an INTSRE0 occurs, error handling is performed to transmit the data corresponding to the error.



After data transmission, a HALT instruction is executed again to wait for reception end interrupt (INTSR0) and

error interrupt (INTSRE0).

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