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DS2181A Datasheet(PDF) 13 Page - Dallas Semiconductor |
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DS2181A Datasheet(HTML) 13 Page - Dallas Semiconductor |
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13 / 32 page ![]() DS2181A 13 of 32 TSD INPUT TIMING Figure 7 CAS OUTPUT FORMAT IN TIMESLOT 16 Figure 8 FRAME 0 1 FRAME 1 FRAME 15 0000XYXX ABCD for Timeslot 1 ABCD for timeslot 17 ABCD for Timeslot 15 ABCD for Timeslot 31 NOTE: 1. Timeslot 16 of frame 0 is reserved for the multiframe alignment word (0000), distant multiframe alarm (Y) and extra bits (X-XX). TINR: TRANSMIT INTERNATIONAL AND NATIONAL REGISTER Figure 9 (MSB) (LSB) INB - TRA NB4 NB5 NB6 NB7 NB8 SYMBOL POSITION NAME AND DESCRIPTION INB TINR.7 International Bit. Inserted into the outgoing data stream when TCR.4 = 1. - TINR.6 Reserved; must be 0 for proper operation. TRA TINR.5 Transmit Remote Alarm 0 = Normal operation; bit 3 of timeslot 0 in non-alignment frame clear. 1 = Alarm condition; bit 3 of timeslot 0 in non-align frames set. NB4 TINR.4 Transmit National Bits. Inserted into the outgoing data stream at TPOS and TNEG when TCR.3 = 1. NB5 TINR.3 NB6 TINR.2 NB7 TINR.1 NB8 TINR.0 TRANSMIT INTERNATIONAL AND NATIONAL DATA Bit 1 of timeslot 0 in all frames is known as the international bit. When TCR.4 = 1, the transmitted international bit is sourced from TINR.7. When TCR.4 = 0, the transmitted international bit is sampled at TIND during the first bit period of each frame. The international bit positions in all outgoing frames except 13 and 15 are replaced by CRC4 code words and the CRC4 multiframe alignment signal when CCR.3 = 1. |
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