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IO10PDB0V0 Datasheet(PDF) 180 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 180 Page - Microsemi Corporation |
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180 / 197 page  Pin Descriptions 5- 66 R e v i sio n 1 2 W3 GND GND W4 MAC_CRSDV/IO51RSB4V0 MAC_CRSDV/IO60RSB4V0 W5 MAC_TXD[1]/IO55RSB4V0 MAC_TXD[1]/IO64RSB4V0 W6 NC SDD2 W7 GNDA GNDA W8 TM0 TM0 W9 ABPS2 ABPS2 W10 GND33ADC0 GND33ADC0 W11 VCC15ADC1 VCC15ADC1 W12 ABPS6 ABPS6 W13 NC CM4 W14 NC ABPS9 W15 NC VCC33ADC2 W16 GNDA GNDA W17 PU_N PU_N W18 GNDSDD1 GNDSDD1 W19 SPI_0_CLK/GPIO_18 SPI_0_CLK/GPIO_18 W20 GND GND W21 SPI_1_SS/GPIO_27 SPI_1_SS/GPIO_27 W22 UART_1_RXD/GPIO_29 UART_1_RXD/GPIO_29 Y1 GPIO_3/IO44RSB4V0 GPIO_3/IO53RSB4V0 Y2 VCCMSSIOB4 VCCMSSIOB4 Y3 GPIO_15/IO34RSB4V0 GPIO_15/IO43RSB4V0 Y4 MAC_TXEN/IO52RSB4V0 MAC_TXEN/IO61RSB4V0 Y5 VCCMSSIOB4 VCCMSSIOB4 Y6 GNDSDD0 GNDSDD0 Y7 CM0 CM0 Y8 GNDTM0 GNDTM0 Y9 ADC0 ADC0 Y10 VCC15ADC0 VCC15ADC0 Y11 ABPS7 ABPS7 Y12 TM3 TM3 Y13 NC ABPS8 Y14 NC GND33ADC2 Pin Number FG484 A2F200 Function A2F500 Function Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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