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IO10PDB0V0 Datasheet(PDF) 183 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 183 Page - Microsemi Corporation |
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183 / 197 page ![]() SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 6 - 1 6 – Datasheet Information List of Changes The following table lists critical changes that were made in each revision of the SmartFusion datasheet. Revision Changes Page Revision 12 (November 2013) CS288 package dimensions added to "SmartFusion cSoC Package Sizes Dimensions" table (SAR 43730). 1-III Added "Typical Programming and Erase Times" table (SAR 43732). 4-9 Definition of Ethernet MAC clarified in the "General Description" section (SAR 50083). 1-1 Clarified GC and GF global inputs in "Global I/O Naming Conventions" section and link to SF Fabric UG added (SAR 42802). 5-6 Revision 11 (September 2013) Modified the description for VAREF0 in the "User-Defined Supply Pins"(SAR 30204). 5-5 Updated the "Pin Assignment Tables" section with a note for A2F500, all packages with GCAx saying: "Signal assigned to those pins as a CLKBUF or CLKBUF_LVPECL or CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal (SAR 45985). 5-18 |
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