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IO10PDB0V0 Datasheet(PDF) 181 Page - Microsemi Corporation |
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IO10PDB0V0 Datasheet(HTML) 181 Page - Microsemi Corporation |
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181 / 197 page  SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 5 - 67 Y15 NC VCC15ADC2 Y16 VCCMAINXTAL VCCMAINXTAL Y17 SDD1 SDD1 Y18 PTEM PTEM Y19 VCC33A VCC33A Y20 SPI_0_SS/GPIO_19 SPI_0_SS/GPIO_19 Y21 VCCMSSIOB2 VCCMSSIOB2 Y22 UART_0_TXD/GPIO_20 UART_0_TXD/GPIO_20 Pin Number FG484 A2F200 Function A2F500 Function Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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