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MAX20021 Datasheet(PDF) 11 Page - Maxim Integrated Products |
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MAX20021 Datasheet(HTML) 11 Page - Maxim Integrated Products |
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11 / 16 page ![]() MAX20021/MAX20022 Automotive Quad, Low-Voltage Step-Down DC-DC Converters www.maximintegrated.com Maxim Integrated │ 11 Detailed Description The MAX20021/MAX20022 PMICs offer four, high- efficiency, synchronous step-down converters that oper- ate with a 3.0V to 5.5V input voltage range and provide a 1.0V to 4.0V output voltage range. The PMICs deliver up to 1.0A of load current per output. The PMICs achieve ±3% output error over load, line, and temperature ranges. The PMICs feature fixed-frequency PWM-mode operation with a 2.2MHz or 3.2MHz switching frequency. An optional spread-spectrum frequency modulation minimizes radiated electromagnetic emissions due to the switching frequency, while a factory-programmable synchronization input (SYNC) allows the device to synchronize to an external clock. Integrated low RDSON switches help minimize efficien- cy losses at heavy loads and reduce critical/parasitic inductance, making the layout a much simpler task with respect to discrete solutions. The PMICs are offered in factory-preset output voltages to allow customers to achieve ±3% output-voltage accuracy, without using expensive 0.1% resistors. In addition, adjust- able output-voltage versions can be set to any desired values between 1.0V and 4.0V using an external resistive divider. See the Selector Guide for available options. Additionally, each converter features soft-start, PG_ output, overcurrent, and overtemperature protections (see Figure 1). Control Scheme The PMICs use peak current-mode control. The devices feature internal slope compensation and internal loop compensation, both of which reduce board space and allow a very compact solution. Hybrid Load-Line Architecture The PMICs feature hybrid load-line architecture to reduce the output capacitance needed, potentially saving system cost and size. This results in a measurable load transient response. Input Overvoltage Monitoring (OV) The PMICs feature an input overvoltage-monitoring circuit on the input supply. When the input exceeds 5.8V (typ) all power-good indicators (PG_) go low. When the input supply returns to within the operating range of 5.7V (typ) or less during the timeout period, the power-good indica- tors go high. Input Undervoltage Monitoring (UVM) The MAX20021 features an input undervoltage monitor- ing circuit on the input supply. When the input drops below 4.3V (typ), all power-good indicators (PG_) go low to indi- cate a potential brownout condition. The device remains operational down to the UVLO threshold. When the input voltage exceeds the UV threshold above 4.4V (typ), PG_ remains low for the factory-trimmed “active timeout period.” UVM is a factory-selectable option. Input Undervoltage Lockout (UVLO) The PMICs feature an undervoltage lockout on the PV_ inputs set at 2.77V (typ) falling. This prevents loss of con- trol of the device by shutting down all outputs. This circuit is only active when at least one buck converter is enabled. Power-Good Outputs (PG_) The PMICs feature an open-drain power-good output for each of the four buck regulators. PG_ asserts low when the output voltage drops 6% below the regulated voltage or 10% above the regulated voltage for approximately 15µs. PG_ remains asserted for a fixed 20,480 switching cycles after the output returns to its regulated voltage. PG_ asserts low during soft-start and in shutdown. PG_ becomes high impedance when Buck_ is in regulation. ConnectPG_toalogicsupplywitha10kΩresistor. Soft-Start The PMICs include a 3272 switching cycle fixed-duration soft-start time. The soft-start time limits startup inrush current by forcing the output voltage to ramp up towards its regulation point. During soft-start, the converters oper- ate in skip mode to prevent the outputs from discharging. When the PMICs exit UVLO or thermal shutdown, there is a fixed blanking time for EN2–EN4 to prevent all four outputs from going through soft-start at the same time. After 24,576 switching cycles with UVLO high and at least one buck converter enabled, there is no blanking time between EN2–EN4 high and the start of soft-start. Figure 2. Load Transient Response +5.0% +1.5% 0% -1.0% -3.5% 1.0A 0A 4µs 1µs1µs 4µs |
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