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HT47C20L Datasheet(PDF) 16 Page - Holtek Semiconductor Inc

Part # HT47C20L
Description  8-Bit Microcontroller
PDF  55 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT47C20L Datasheet(HTML) 16 Page - Holtek Semiconductor Inc

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HT47C20L
16
January 18, 2000
Oscillator configuration
The HT47C20L provides one 32768Hz crystal
oscillator for real time clock and system clock.
The 32768Hz crystal oscillator still work at halt
mode. The halt mode stop the system clock and
T1 and ignores an external signal to conserve
power. The real time clock comes from 32768Hz
crystal and still works at halt mode.
A 32768Hz crystal across OSC1 and OSC2 is
needed to provide the feedback and phase shift
needed for the oscillator, no other external
components are needed.
Watchdog timer - WDT
The clock source of the WDT (fs) is implemented
by a 32768Hz crystal oscillator. The timer is
designed to prevent a software malfunction or
sequence jumping to an unknown location with
unpredictable results. The watchdog timer can
be disabled by mask option. If the watchdog
timer is disabled, all the executions related to
the WDT result in no operation.
The ²HALT² instruction is executed, WDT still
counts and can wake-up from halt mode due to the
WDT time-out.
The WDT overflow under normal operation will
initialize ²chip reset² and set the status bit TO.
Whereas in the halt mode, the overflow will ini-
tialize a ²warm reset² only the PC and SP are re-
set to zero. To clear the contents of WDT, three
methods are adopted, external reset (a low level
to RES), software instruction, or a HALT instruc-
tion. The software instructions are of two sets
which include CLR WDT and the other set - CLR
WDT1 and CLR WDT2. Of these two types of in-
struction, only one can be active depending on the
mask option -²CLR WDT times selection op-
tion².Ifthe ²CLR WDT² is selected (i.e., CLR
WDT times equal one), any execution of the CLR
WDT instruction will clear the WDT. In case
²CLR WDT1² and ²CLR WDT2² are chosen (i.e.
CLR WDT times equal two), these two instruc-
tions must be executed to clear the WDT; other-
wise, the WDT may reset the chip because of the
time-out.
The WDT time-out period ranges from
fs/215~fs/216. The ²CLR WDT² or ²CLR WDT1²
and ²CLRWDT2² instruction only clear the last
two-stage of the WDT.
Multi-function timer
The HT47C20L provides a multi-function timer
for the WDT, time base and real time clock but
with different time-out periods. The
multi-function timer consists of a 7-stage di-
vider and an 8-bit prescaler, with the clock
source coming from the 32768Hz. The
multi-function timer also provides a fixed fre-
quency signal (fs/8) for the LCD driver circuits,
and a selectable frequency signal (ranges from
fs/22 to fs/29) for buzzer output by mask option.
3276 8H z
fs
( s t i l l w or k s at hal t m ode)
S yst e m c l o ck
( S t o ps a t h al t m o de )
T1
( s t o ps at hal t m ode)
C r yst a l O sci l l a t o r
OS C 1
OS C 2
32768Hz crystal
3276 8H z C r y s t al O S C
D i v i der
P r e sca l e r
W D T C l ear
CK T
R
CK T
R
T i m e - o ut R es et
f s /2
~ f s /2
15
16
8
f s /2
f s
Watchdog timer



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