GMS36 datasheet(97/109 Pages) HYNIX

97 / 109 page

9-4

Program / Verify Timing Diagrams In kHz Version.

1) EPROM Write & Verify Mode (1Byte)

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#. Note :

1. Internal system is reset at VPP = 12.5V and K2=`Low`

2. The reset release (K2=`High`) must be set within OSC1 = `Low` state.

(From this time, OSC1 clock is counted.)

3. The Data will be inputted from the 19th rising edge of OSC1.

4. If not written during 10 times repeats (120us), repeat the 5 times until all is written.

5. For device verify. If you set Lock bit, output data is always `0F`h.

Chapter 9. EPROM

GMS36 Datasheet(PDF) 97 Page - Hynix Semiconductor

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