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GMS87C1102 Datasheet(PDF) 75 Page - Hynix Semiconductor |
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GMS87C1102 Datasheet(HTML) 75 Page - Hynix Semiconductor |
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75 / 89 page  GMS81C1102 / GMS81C1202 72 Jan. 2002 ver 2.0 Figure 24-2 Pin Assignment Table 24-1 Pin Description in EPROM Mode Pin No. User Mode EPROM MODE Pin Name Pin Name Description 1 RA4 (AN4) A_D4 Address Input Data Input/Output A12 A4 D4 2 RA5 (AN5) A_D5 A13 A5 D5 3 RA6 (AN6) A_D6 A14 A6 D6 4 RA7 (AN7) A_D7 A15 A7 D7 5 VDD VDD Connect to VDD (6.0V) 6 RB0 (AVref/AN0) CTL0 Read/Write Control Address/Data Control 7 RB2 (INT0) CTL1 8 RB4 (PWM/COMP) CTL2 9 XIN EPROM Enable High Active, Latch Address in falling edge 10 XOUT NC No connection 11 RESET VPP Programming Power (0V, 12.75V) 12 VSS VSS Connect to VSS (0V) 13 RA0 (EC0) A_D0 Address Input Data Input/Output A8 A0 D0 14 RA1 (AN1) A_D1 A9 A1 D1 15 RA2 (AN2) A_D2 A10 A2 D2 16 RA3 (AN3) A_D3 A11 A3 D3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VPP A_D0 A_D1 A_D2 A_D3 EPROM Enable A_D7 A_D6 A_D5 A_D4 CTL2 CTL1 CTL0 NC VSS VDD |
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