5.08

8

IDT72V01/72V02/72V03/72V04 3.3 VOLT CMOS ASYNCHRONOUS FIFO

512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9

COMMERCIAL TEMPERATURE RANGE

EF

W

R

2679 drw 09

Figure 7. Minimum Timing for an Empty Flag Coincident Read Pulse

FF

R

W

2679 drw 10

Figure 8. Minimum Timing for an Full Flag Coincident Write Pulse

R

W

HF

2678 drw 11

HALF-FULL OR LESS

MORE THAN HALF-FULL

HALF-FULL OR LESS

Figure 9. Half-Full Flag Timing

R

W

XO

2679 drw 12

WRITE TO

LAST PHYSICAL

LOCATION

READ FROM

LAST PHYSICAL

LOCATION

Figure 10. Expansion Out