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AD5040/AD5060

Rev. A | Page 20 of 24

USING THE AD5040/AD5060 WITH A

GALVANICALLY ISOLATED INTERFACE CHIP

In process control applications in industrial environments, it is

often necessary to use a galvanically isolated interface to protect

and isolate the controlling circuitry from any hazardous

common-mode voltages that can occur in the area where the

DAC is functioning. iCoupler® provides isolation in excess of

2.5 kV. Because the AD5040/AD5060 use a 3-wire serial logic

interface, the ADuM130x family provides an ideal digital

solution for the DAC interface.

The ADuM130x isolators provide three independent isolation

channels in a variety of channel configurations and data rates.

They operate across the full range from 2.7 V to 5.5 V, providing

compatibility with lower voltage systems as well as enabling a

voltage translation functionality across the isolation barrier.

Figure 52 shows a typical galvanically isolated configuration

using the AD5040/AD5060. The power supply to the part

also needs to be isolated; this is accomplished by using a

transformer. On the DAC side of the transformer, a 5 V

regulator provides the 5 V supply required for the

AD5040/AD5060.

0.1

μF

VDD

GND

POWER

REGULATOR

ADuM1300

SCLK

V0A

V1A

SCLK

VOUT

SYNC

V0B

V1B

SDI

DIN

V0C

V1C

DATA

AD5040/

AD5060

Figure 52. AD5040/AD5060 with a Galvanically Isolated Interface

POWER SUPPLY BYPASSING AND GROUNDING

When accuracy is important in a circuit, it is helpful to carefully

consider the power supply and ground return layout on the

board. The printed circuit board containing the AD5040/

AD5060 should have separate analog and digital sections, each

having its own area of the board. If the AD5040/AD5060 are in

a system where other devices require an AGND-to-DGND

connection, the connection should be made at one point only.

This ground point should be as close as possible to the

AD5040/AD5060.

The power supply to the AD5040/AD5060 should be bypassed

with 10 μF and 0.1 μF capacitors. The capacitors should be

physically as close as possible to the device with the 0.1 μF

capacitor ideally right up against the device. The 10 μF

capacitors are the tantalum bead type. It is important that the

0.1 μF capacitor has low effective series resistance (ESR) and

effective series inductance (ESI), as do common ceramic types

of capacitors. This 0.1 μF capacitor provides a low impedance

path to ground for high frequencies caused by transient

currents due to internal logic switching.

The power supply line itself should have as large a trace as

possible to provide a low impedance path and reduce glitch

effects on the supply line. Clocks and other fast switching

digital signals should be shielded from other parts of the board

by a digital ground. Avoid crossover of digital and analog

signals, if possible. When traces cross on opposite sides of the

board, ensure that they run at right angles to each other to

reduce feedthrough effects on the board. The best board layout

technique is the microstrip technique where the component

side of the board is dedicated to the ground plane only, and the

signal traces are placed on the solder side. However, this is not

always possible with a two-layer board.

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