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80960CF-33 Datasheet(PDF) 65 Page - Intel Corporation |
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80960CF-33 Datasheet(HTML) 65 Page - Intel Corporation |
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65 / 77 page ![]() PRELIMINARY 59 A 80960CF-40, -33, -25, -16 Figure 36. Burst, Pipelined Read Request Without Wait States, 32-Bit Bus Pipelined reads conclude, non-pipelined requests begin ADS A31:4, SUP, DMA, D/C, BE3:0, LOCK W/R BLAST DT/R DEN A3:2 WAIT D31:0 PCLK Non-pipelined request concludes, pipelined reads begin Byte Order Bus Width NWDD NWAD NXDA NRDD NRAD Pipe- Lining External Ready Control Burst 31-23 22 18-17 21 20-19 16-12 7-3 11-10 9-8 210 X x 0 0 X xx 32-bit 10 X xx X xxxxx 0 00 0 00000 ON 1 Enabled 1 0 0..0 Disabled 0 AD D D A' D' D' Valid Valid In- Valid Valid 01 10 11 00 IN D IN D IN D IN D IN D IN D Valid D Function Bit Value In- Valid In- Valid F_CX037A |
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