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AD5380 Datasheet(PDF) 23 Page - Analog Devices |
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AD5380 Datasheet(HTML) 23 Page - Analog Devices |
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23 / 40 page ![]() Data Sheet AD5380 ON-CHIP SPECIAL FUNCTION REGISTERS (SFR) The AD5380 contains a number of special function registers (SFRs), as outlined in Table 13. SFRs are addressed with REG1 = REG0 = 0 and are decoded using Address Bits A5 to A0. Table 13. SFR Register Functions (REG1 = 0, REG0 = 0) R/W A5 A4 A3 A2 A1 A0 Function X 0 0 0 0 0 0 NOP (No Operation) 0 0 0 0 0 0 1 Write CLR Code 0 0 0 0 0 1 0 Soft CLR 0 0 0 1 0 0 0 Soft Power-Down 0 0 0 1 0 0 1 Soft Power-Up 0 0 0 1 1 0 0 Control Register Write 1 0 0 1 1 0 0 Control Register Read 0 0 0 1 0 1 0 Channel Monitor 0 0 0 1 1 1 1 Soft Reset SFR COMMANDS NOP (No Operation) REG1 = REG0 = 0, A5 to A0 = 000000 Performs no operation, but is useful in serial readback mode to clock out data on DOUT for diagnostic purposes. BUSY pulses low during a NOP operation. Write CLR Code REG1 = REG0 = 0, A5–A0 = 000001 DB13 to DB0 = Contain the CLR data Bringing the CLR line low or exercising the soft clear function will load the contents of the DAC registers with the data con- tained in the user configurable CLR register, and will set VOUT0 to VOUT39 accordingly. This can be very useful for setting up a specific output voltage in a clear condition. It is also beneficial for calibration purposes; the user can load full scale or zero scale to the clear code register and then issue a hard- ware or software clear to load this code to all DACs, removing the need for individual writes to each DAC. Default on power- up is all zeros. Soft CLR REG1 = REG0 = 0, A5 to A0 = 000010 DB13 to DB0 = Don’t Care Executing this instruction performs the CLR, which is func- tionally the same as that provided by the external CLR pin. The DAC outputs are loaded with the data in the CLR code register. It takes 35 µs to fully execute the SOFT CLR, as indicated by the BUSY low time. Soft Power-Down REG1 = REG0 = 0, A5 to A0 = 001000 DB13 to DB0 = Don’t Care Executing this instruction performs a global power-down feature that puts all channels into a low power mode that reduces the analog supply current to 2 µA max and the digital current to 20 µA max. In power-down mode, the output amplifier can be configured as a high impedance output or can provide a 100 kΩ load to ground. The contents of all internal registers are retained in power-down mode. No register can be written to while in power-down. Soft Power-Up REG1 = REG0 = 0, A5 to A0 = 001001 DB13 to DB0 = Don’t Care This instruction is used to power up the output amplifiers and the internal reference. The time to exit power-down is 8 µs. The hardware power-down and software function are internally combined in a digital OR function. Soft RESET REG1 = REG0 = 0, A5 to A0 = 001111 DB13 to DB0 = Don’t Care This instruction is used to implement a software reset. All internal registers are reset to their default values, which correspond to m at full scale and c at zero scale. The contents of the DAC registers are cleared, setting all analog outputs to 0 V. The soft reset activation time is 135 µs. Only perform a soft reset when the AD5380 is not in power-down mode. Rev. D | Page 23 of 40 |
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