7-886

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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CD4046BMS

CMOS Micropower Phase Locked Loop

Description

CD4046BMS CMOS Micropower Phase-Locked Loop (PLL)

consists of a low power linear voltage-controlled oscillator (VCO)

and two different phase comparators having a common signal-

input amplifier and a common comparator input. A 5.2V zener

diode is provided for supply regulation if necessary.

The CD4046BMS is supplied in these 16-lead outline packages:

VCO Section

The VCO requires one external capacitor C1 and one or two

external resistors (R1 or R1 and R2). Resistor R1 and capacitor

C1 determine the frequency range of the VCO and resistor R2

enables the VCO to have a frequency offset if required. The high

pass filters by permitting the designer a wide choice of resistor-

to-capacitor ratios. In order not to load the low-pass filter, a

source-follower output of the VCO input voltage is provided at ter-

minal 10 (DEMODULATED OUTPUT). If this terminal is used, a

load resistor (RS) of 10k

Ω or more should be connected from

this terminal to VSS. If unused this terminal should be left open.

The VCO can be connected either directly or through frequency

dividers to the comparator input of the phase comparators. A full

CMOS logic swing is available at the output of the VCO and

allows direct coupling to CMOS frequency dividers such as the

Intersil CD4024, CD4018, CD4020, CD4029, and CD4050. One

or more CD4018 (Preset Table Divide-By-N Counter) or CD4029

(Presettable Up/Down Counter) or CD4029 (Presettable Divide-

by-N Counter) or CD4029 (Presettable Up/Down Counter), or

CD4059A (Programmable Divide-by “N” Counter), together with

the CD4046BMS (Phase-Locked Loop) can be used to build a

micropower low-frequency synthesizer. A logic 0 on the INHIBIT

input “enables” the VCO and the source follower, while a logic 1

“turns off” both to minimize stand-by power consumption.

Pinout

CD4046BMS

TOP VIEW

Braze Seal DIP

H4W

Frit Seal DIP

H1F

Ceramic Flatpack H6W

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

PHASE PULSES

PHASE COMP I OUT

COMPARATOR IN

VCO OUT

INHIBIT

CI(1)

VSS

C1 (2)

VDD

SIGNAL IN

PHASE COMP II OUT

R2 TO VSS

R1 TO VSS

DEMODULATOR OUT

VCO IN

ZENER

Features

• Very Low Power Consumption:

70

µW (typ.) at VCO fo = 10kHz, VDD = 5V

• Operating Frequency Range Up to 1.4 MHz (typ.) at

VDD = 10V, RI = 5k

Ω

• Choice of Two Phase Comparators:

- Exclusive-OR Network (I)

- Edge-Controlled Memory Network with Phase-Pulse

Output for Lock Indication (II)

• High VCO Linearity: <1% (typ.) at VDD = 10V

• VCO Inhibit Control for ON-OFF Keying and Ultra-Low

Standby Power Consumption

• Source-Follower

Output

of

VCO

Control

Input

(Demod. Output)

• Zener Diode to Assist Supply Regulation

• Standardize, Symmetrical Output Characteristics

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

• Meets All Requirements of JEDEC Tentative Standard

No. 13B, “Standard Specifications for Description of ‘B’

Series CMOS Devices”

Applications

• FM Demodulator and Modulator

• Frequency Synthesis and Multiplication

• Frequency Discriminator

• Data Synchronization

• Voltage-to-Frequency Conversion

• Tone Decoding

• FSK - Modems

• Signal Conditioning

December 1992

File Number

3312