AN1496 - APPLICATION NOTE

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Table 1 : Commands for ST10 with 0.35

µm embedded Flash

Notes 1. Address bit A14, A15 and above are don’t care for coded address inputs.

2. X = Don’t Care.

3. WA = Write Address: address of memory location to be programmed.

4. WD = Write Data: 16-bit data to be programmed

5. Optional, additional blocks addresses must be entered within a time-out delay (96 µs) after last write entry, timeout status can be

verified through FSB.3 value. When full command is entered, read Data Polling or Toggle bit until Erase is completed or suspended.

6. Read Data Polling or Toggle bit until Erase completes.

7. WPR = Write protection register. To protect code, bit 15 of WPR must be ‘0’. To protect block N (N=0,1,...), bit N of WPR must be

‘0’. Bit that are already at ‘0’ in protection register must also be ‘0’ in WPR, else a writing error will occurs (it is not possible to write a

‘1’ in a bit already programmed at ‘0’).

8. MEM = any address inside the Flash memory space. Absolute addressing mode must be used (MOV MEM, Rn), and instruction

must be executed from Flash memory space.

9. Odd word address = 4n-2 where n = 0, 1, 2, 3..., ex. 0002h, 0006h...

Instruction

Mne

Cycle

Cycle

Cycle

Cycle

Cycle

Cycle

Read/Reset

RD

1+

Read Memory Array until a new write cycle is initiated

Data

xxF0h

Read/Reset

RD

3+

x1554h

x2AA8h

xxxxxh

Read Memory Array until a new write

cycle is initiated

Data

xxA8h

xx54h

xxF0h

Program Word

PW

4

x1554h

x2AA8h

x1554h

Read Data Polling or

Toggle Bit until Program

completes.

Data

xxA8h

xx54h

xxA0h

Block Erase

BE

6

x1554h

x2AA8h

x1554h

x1554h

x2AA8h

BA

Data

xxA8h

xx54h

xx80h

xxA8h

xx54h

xx30h

xx30h

Chip Erase

CE

6

x1554h

x2AA8h

x1554h

x1554h

x2AA8h

x1554h

Data

xxA8h

xx54h

xx80h

xxA8h

xx54h

xx10h

Erase Suspend

ES

1

Read until Toggle stops, then read or program all data needed

from block(s) not being erased then Resume Erase.

Data

xxB0h

Erase Resume

ER

1

Read Data Polling or Toggle bit until Erase completes or Erase

is supended another time.

Data

xx30h

Set Block/Code

Protection

SP

4

x2A54h

x15A8h

x2A54h

Any odd

word

Data

xxA8h

xx54h

xxC0h

Read

Protection

Status

RP

4

x2A54h

x15A8h

x2A54h

Any odd

word

Read Protection Register

until a new write cycle is

initiated.

Data

xxA8h

xx54h

xx90h

Read

PR

Block

Temporary

Unprotection

BTU

4

x2A54h

x15A8h

x2A54h

Data

xxA8h

xx54h

xxC1h

xxF0h

Code

Temporary

Unprotection

CTU

1

Write cycles must be executed from Flash.

Data

FFFFh

Code

Temporary

Protection

CTP

1

Write cycles must be executed from Flash.

Data

FFFBh