AN4026 datasheet(19/40 Pages) STMICROELECTRONICS

19 / 40 page

AN4026

Functional check

Doc ID 022603 Rev 1

19/40

The LINE pin (#7) has been dimensioned to start up the L6699 once the PFC output voltage

has reached the rated value, in order to have correct converter sequencing, with PFC

starting first and LLC starting later in order to optimize the design of the LLC converter and

prevent capacitive mode operation that may occur because of operation at too low input

voltage.

The DELAY pin (#2) is zero, as it must be, during normal operation because it works during

the overcurrent protection operation. The DIS pin (#8) is used for open loop protection and

therefore, even in this case, its voltage is at ground level.

In Figure 16 the pin voltages relevant to the control part of the L6699 are reported: the

RFmin pin (#4) is the 2 V (typ.) reference voltage of the oscillator, the switching frequency is

proportional to the current flowing out from the pin. The CSS pin (#1) voltage is the same

value as pin #4 because it is connected to the latter via a resistor (R44), determining the

soft-start frequency. A capacitor (C18) is also connected between the CSS pin and ground

to set the soft-start time. At the beginning of L6699 operation the voltage on the CSS pin is

at ground level because C18 is discharged, the CSS pin (#1) voltage then increases

according to the time constant till the RFmin voltage level is reached. The STBY pin (#5)

senses the optocoupler voltage, once the voltage decreases to 1.25 V both gate drivers stop

switching and the circuit works in burst mode. The CF pin (#3) is the controller oscillator; its

ramp speed is proportional to the current flowing out from the RFmin pin (#4). The CF signal

must be clean and undistorted to obtain correct symmetry by the half bridge current,

therefore, care must be taken in the layout of the PCB.

4.1

Burst mode operation

In Figure 17 some burst mode pulses are captured during a 250 mW load operation. Note

that the burst pulses are very narrow and their period is quite long, therefore the resulting

equivalent switching frequency is very low, ensuring high efficiency. The resulting output

voltage ripple during burst mode operation is about 58 mV peak-to-peak.

In Figure 18 the detail of the burst is reported: note that the first initial pulse is shorter than

the following ones, avoiding the typical high current peak at half bridge operation restart due

to the recharging of the resonant capacitor. It is also possible to note that the maximum

Figure 15.

L6699 pin signals-1

Figure 16.

L6699 pin signals-2

CH1: DIS

CH3: DELAY

CH2: LINE

CH4: ISEN

CH1: RFmin

CH3: CSS

CH2: STBY

CH4: CF

AN4026 Datasheet(PDF) 19 Page - STMicroelectronics

AN4026 Datasheet(HTML) 19 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL