AN4057 datasheet(6/13 Pages) STMICROELECTRONICS

6 / 13 page

Offset voltage on VDD_HV_REG and voltage regulator circuitry

AN4057

6/13

Doc ID 022842 Rev 2

Offset voltage on VDD_HV_REG and voltage regulator

circuitry

2.1

Offset voltage on VDD_HV_REG: problem description

VDD_HV_REG offset on the devices SPC560Pxx/SPC56APxx, before the module is powered

up, may in some cases prevent the power up device correctly.

A VDD_HV_REG offset before a correct power up supply sequence can set the POR device

logic to an undefined state, preventing the internal logic to switch correctly and initialize the

internal VDD_LV circuitry. The internal regulator remains in power down. The consequence is

that the microcontroller is not able to exit reset.

2.1.1

Possible application paths to induce a VDD_HV_REG offset voltage

Figure 1 describes a GPIO configuration with the pin connected to an externally supplied

signal (Vbatt).

If Vbatt is powered while MCU VDD is not yet provided, GPIO protection circuitry (diode)

induces a voltage on VDD_HV_IO.

In the case VDD_HV_IO is directly connected to VDD_HV_REG, the induced voltage is

propagated to the internal regulator. The same consideration is done when using an

external diode, D1 in Figure 1, connecting GPIO VIN to VDD.

Figure 1.

Offset voltage on VDD_HV_REG from SPC560Pxx/SPC56APxx input pin

2.1.2

Battery short to pin on connector of microcontroller board

Another possible cause of an initial offset on VDD_HV_REG is battery short to any pin of the

board connector.

AN4057 Datasheet(PDF) 6 Page - STMicroelectronics