AN4057 datasheet(8/13 Pages) STMICROELECTRONICS

8 / 13 page

Offset voltage on VDD_HV_REG and voltage regulator circuitry

AN4057

8/13

Doc ID 022842 Rev 2

Static consumption has to be considered into the board voltage regulator design.

Figure 3.

Resistors partition network

2.2.2

VDD_HV_REG pin active path to ground

Another solution is to add a controlled active path to ground on VDD_HV_REG/VDD_HV_IO that

forces these pins to ground when the microcontroller is switched off or discharges the

VDD_HV_REG at start up.

Figure 4 describes a generic configuration that uses the enable signal of an external

regulator, VIGN, to drive the gate of NFET to force VDD_HV_REG/VDD_HV_IO pin to ground.

When the external regulator is off there is a discharge path of the current from the

VDD_HV_REG/VDD_HV_IO.

It has to be granted that the VDD rises with the required monotonic slew rate before any fault

condition can build up an offset on VDD_HV_REG, prior to the release of the active discharge

circuit.

Table 1.

Resistor partition network values

Symbol

Parameter

Value

Unit

VDD_HV_REG@ 5 V

Resistor between VDD_HV_REG/ballast

emitter and ballast collector

910

Resistor between ballast emitter and

ground

300

VDD_HV_REG@ 3.3 V

Resistor between VDD_HV_REG/ballast

emitter and ballast collector

510

Resistor between ballast emitter and

ground

300

AN4057 Datasheet(PDF) 8 Page - STMicroelectronics