AN2466

Pin description of STMPE801

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Figure 5.

Figure 6.

2.2.1

address of 0x00 with R/

= 0 is sent, the device responds with an acknowledgement and

performs the instruction given by the second byte. The device does not give ACK for any

second byte other than the valid second bytes listed in Table 3.

2.3

Reset pin (RESET_N)

The Reset pin is an active low input. It should be tied HIGH to VIO supply in order to start

normal operation of the device. Apart from the RESET_N pin, the device can also be reset

through the "Soft_Reset" bit in the SYSCON register. Writing a '1' to Bit 7 resets the device

and after reset, the bit is cleared to '0' by the Hardware.

PAD

Open

Drain

Buffer

INTERNAL

BLOCKS

ESD DIODE

INPUT BUFFER

Table 3.

Second byte

Definition

0x06

Slave device should reset and latch in the slave address

0x04

Slave device should latch in the slave address but without reset.

0x0

Not allowed as second byte.

W