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PD78F9232CS Datasheet(PDF) 23 Page - Renesas Technology Corp |
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PD78F9232CS Datasheet(HTML) 23 Page - Renesas Technology Corp |
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23 / 30 page ![]() Preliminary Product Information U18550EJ2V0PM 21 µ PD78F9232CS, 78F9234CS LVI Circuit Characteristics (TA = −40 to +85°C) Parameter Symbol Conditions MIN. TYP. MAX. Unit VLVI0 4.1 4.3 4.5 V VLVI1 3.9 4.1 4.3 V VLVI2 3.7 3.9 4.1 V VLVI3 3.5 3.7 3.9 V VLVI4 3.3 3.5 3.7 V VLVI5 3.15 3.3 3.45 V VLVI6 2.95 3.1 3.25 V VLVI7 2.7 2.85 3.0 V VLVI8 2.5 2.6 2.7 V Detection voltage VLVI9 2.25 2.35 2.45 V Response time Note 1 tLD 0.2 2.0 ms Minimum pulse width tLW 0.2 ms Operation stabilization wait time Note 2 tLWAIT 0.1 0.2 ms Notes 1. Time required from voltage detection to interrupt output or internal reset signal generation. 2. Time required from setting LVION to 1 to operation stabilization. Remarks 1. VLVI0 > VLVI1 > VLVI2 > VLVI3 > VLVI4 > VLVI5 > VLVI6 > VLVI7 > VLVI8 > VLVI9 2. VPOC < VLVIm (m = 0 to 9) LVI Circuit Timing Supply voltage (VDD) Detection voltage (MIN.) Detection voltage (TYP.) Detection voltage (MAX.) tLW tLD tLWAIT LVION 1 Time Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (TA = −40 to +85°C) Parameter Symbol Conditions MIN. TYP. MAX. Unit Data retention supply voltage VDDDR 2.0 5.5 V Release signal set time tSREL 0 µs |
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