UPD17717GC datasheet(49/408 Pages) NEC

49 / 408 page

µPD17717, 17718, 17719

5.6.2 Functions of index register and data memory row address pointer

The index register and data memory row address pointer modify the addresses of the data memory.

The following paragraphs (1) and (2) describe their functions.

A dedicated instruction (“INC IX”) that increments the value of the index register by one is available.

For the details of address modification, refer to 7. ALU (Arithmetic Logic Unit) BLOCK.

(1) Index register (IX)

When a data memory manipulation instruction is executed, the data memory address is modified by the

contents of the index register.

This modification, however, is valid only when the IXE flag is set to 1.

To modify the address, the bank, row address, and column address of the data memory are ORed with

the contents of the index register, and the instruction is executed to a data memory address (called real

address) specified by the result of this OR operation.

All data memory manipulation instructions are subject to address modification by the index register.

The following instructions, however, are not subject to address modification by the index register.

INC

RORC

INX

CALL

addr

MOVT

DBF, @AR

CALL

@AR

PUSH

RET

POP

RETSK

PEEK

WR,rf

RETI

POKE

rf,WR

GET

DBF,p

PUT

p, DBF

STOP s

addr

HALT h

@AR

NOP

(2) Data memory row address pointer (MP)

When the general register indirect transfer instruction (“MOV @r,m” or “MOV m,@r”) is executed, the

indirect transfer destination address is modified.

This modification, however, is valid only when the MPE flag is set to 1.

To modify the address, the bank and row address at the indirect transfer destination are replaced by the

contents of the data memory row address pointer.

Instructions other than the general register indirect transfer instruction are not subject to address

modification.

(3) Index register increment instruction (“INC IX”)

This instruction increments the contents of the index register by one.

Because the index register is configured of 10 bits, its contents are incremented to “000H” if the “INC

IX” instruction is executed when the contents of the index register are “3FFH”.

UPD17717GC Datasheet(PDF) 49 Page - NEC

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