AN2738 datasheet(9/54 Pages) STMICROELECTRONICS

9 / 54 page

AN2738

Dead time and interlocking function management

Doc ID 14589 Rev 2

9/54

Figure 4.

Timing waveforms

Figure 5.

Typical dead time vs. DT resistor value

LIN

HIN

LVG

HVG

LIN

HIN

LVG

HVG

LIN

HIN

LVG

HVG

LIN

HIN

LVG

HVG

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

CONTROL SIGNAL EDGES

OVERLAPPED:

INTERLOCKING + DEAD TIME

CONTROL SIGNALS EDGES

SYNCHRONOUS (*):

DEAD TIME

CONTROL SIGNALS EDGES

NOT OVERLAPPED,

BUT INSIDE THE DEAD TIME:

DEAD TIME

CONTROL SIGNALS EDGES

NOT OVERLAPPED,

OUTSIDE THE DEAD TIME:

DIRECT DRIVING

(*) HIN and LIN can be connected togheter and driven by just one control signal

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

gate driver outputs OFF

(HALF-BRIDGE TRI-STATE)

0.5

1.5

2.5

3.5

100

150

200

250

300

Rdt (kOhm)

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