List of figures

AN2738

4/54

Doc ID 14589 Rev 2

List of figures

Figure 1.

L6390 application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2.

Input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3.

L6390 gate driver outputs in UVLO condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4.

Timing waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 5.

Typical dead time vs. DT resistor value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 6.

Smart shutdown timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 7.

Smart shutdown equivalent circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 8.

Protection scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 9.

Disable time vs. SD capacitance (typical values) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 10.

3-phase system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11.

General advanced current sense scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 12.

Advanced current sensing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 13.

L6390 op-amp, application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 14.

Typical L6390 ideal output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 15.

Detail on single PWM cycle in advanced current sensing for FOC systems . . . . . . . . . . . 17

Figure 16.

Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 17.

External charge pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 18.

3-phase drive- typical scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19.

Typical application schematic of a 3-phase FOC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 20.

Ex. of an application circuit for one of the three half-bridges of a 3-phase power stage . . 23

Figure 21.

Layout suggestion for the gate driving circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 22.

Gate driver output: equivalent circuit for turn-on. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 23.

Gate driver output: equivalent circuit for turn-off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 24.

Hard switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 25.

Soft switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 26.

Turn-on hard switching details with induction load: gate charge and plateau phase . . . . . 29

Figure 27.

Total equivalent circuit for the turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 28.

Turn-off hard switching details with induction load: gate charge and plateau phase . . . . . 31

Figure 29.

Total equivalent circuit for the turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 30.

Power dissipation during switching (approximation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 31.

Figure 32.

Induced turn-on phenomenon - circuital description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 33.

Block diagram of output current capability enhancement using external current buffers . . 37

Figure 34.

Example of a gate driving circuit with current buffers for current capability increasing. . . . 38

Figure 35.

below-ground voltages in L6390 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 36.

Transient peak forward voltage vs. dIF/dt of STTH1L06 diode . . . . . . . . . . . . . . . . . . . . . . 41

Figure 37.

Use of OUT resistor to limit the below ground voltage spike on OUT pin. . . . . . . . . . . . . . 41

Figure 38.

Use of combination of OUT resistor and OUT diode to limit the below ground voltage spike

on OUT pin

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Figure 39.

Bootstrap over-charging due to below-ground voltage on OUT pin . . . . . . . . . . . . . . . . . . 44

Figure 40.

Different bootstrap network characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Figure 41.

L6390 safe operating range when the OUT pin is below ground voltage (in steady state). 46

Figure 42.

Driver functionality in below-ground voltage condition on OUT pin . . . . . . . . . . . . . . . . . . 46

Figure 43.

OUT below-ground voltage in transient conditions: limited boot over-charging . . . . . . . . . 48

Figure 44.

Example of below-ground voltage spike . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Figure 45.

Layout suggestion for a 3-phase power system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Figure 46.

Layout example from the STEVAL-IHM021V1 3-phase board . . . . . . . . . . . . . . . . . . . . . . 52