AN3009 datasheet(22/36 Pages) STMICROELECTRONICS

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Designing a transition mode PFC

AN3009

22/36

Doc ID 16032 Rev 4

Thus, the activity of the gate driver is immediately stopped, the device is shut down, its

quiescent consumption is reduced to less than 180 µA and the condition is latched for as

long as the supply voltage of the IC remains above the UVLO threshold. To restart the

system, it is necessary to recycle the input power so that the VCC voltage of the L6564 goes

below 6 V and that one of the PWM controllers goes below its UVLO threshold. Note that

this function offers a complete protection against not only feedback loop failures or

erroneous settings, but also a failure of the protection itself. If either one of the PFC_OK

dividers fails to short or open, or a PFC_OK pin is floating, the IC is shut down and the pre-

regulator stopped. Moreover, the PFC_OK pin doubles its function as a not-latched IC

disable: a voltage below 0.23 V shuts down the IC, reducing its consumption below 2 mA. To

restart the IC, simply let the voltage at the pin go above 0.27 V.

Pin 2 (COMP): this pin is the output of the E/A that is fed into one of the two inputs of the

multiplier. A feedback compensation network is placed between this pin and INV (pin #1). It

has to be designed with a narrow bandwidth to prevent the system from rejecting the output

voltage ripple (100 Hz) that would result in a high distortion of the input current waveform.

A simple way of defining the capacitance value is to set the bandwidth (BW) from 20 to 30

Hz. The compensation network can be a simple capacitor, providing a low-frequency pole as

well as a high DC gain. A more complex network, typically a type-II CRC network providing

two poles and a zero, is more suitable for constant power loads like a downstream converter.

If a single capacitor is used it can be dimensioned using the following formulas.

Equation 42

Equation 43

For a more complex compensation network calculation refer to [

2] and [3] in

Chapter 6: References.

For this 100 W TM PFC, a CRC network providing two poles and a zero has been

implemented with the following values.

The relevant open-loop transfer function and its phase function are reported in

Figure 9 and

Figure 10.

(14)

()

Compensati

outL

outH

⋅

() BW

outL

outH

Compensati

⋅

compP =

680

compS =

Ω

compS

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