AN3994 datasheet(46/53 Pages) STMICROELECTRONICS

46 / 53 page

MOSFET critical parameters in high switching environments

AN3994

46/53

Doc ID 022380 Rev 1

Figure 64.

Schematic of 4-pin solution

The best way to minimize the inductance influence is to adopt the Kelvin source connection

(see Figure 64); this solution dramatically cuts the common path between the drain current

and the gate current as the Kelvin pin is directly referenced to the driving stage GND. The

result is that the energy losses are reduced and the rate of drain current during transients is

sped up. Figure 65 and 66, showing the differences in terms of energy ON and energy OFF

between a standard 3-pin with an optimized layout and the 4-pin, refer to the same PCB

circuit of the previous sets of experimental waveforms of Figure 48 and 49: this leads to the

obvious conclusion that the 4-pin solution allows the user to speed up the SJ MOSFET with

excellent results, not reachable by the 3-pin solution even if optimized in terms of layout

configuration.

Figure 65.

STW77N65M5 energy ON difference between the optimized layout (3-pin)

and 4-pin solution

AN3994 Datasheet(PDF) 46 Page - STMicroelectronics