AN1709 datasheet(26/38 Pages) STMICROELECTRONICS

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EMC DESIGN GUIDE FOR ST MICROCONTROLLERS

3.1.4 Multiple VDD & VSS.

As already said for the I/O pins, in order to ensure ST Microcontroller compliance with respect

to Quality Assurance recommendations concerning ESD and Latch-up, dedicated circuits are

added to the different power supply and ground pins (digital and analog). These structures

create preferred paths for the high current injected during discharges, avoiding damage to ac-

tive logic and circuitry. It is important for the system designer to take this added circuitry into

account, when applying different current levels and voltages to the power supply and ground

pins. Figure 17. shows schematically the protection net implemented on ST Microcontroller

devices, composed of diodes and other special structures.

The clamp structure between the VDD and VSS pins is designed to be active during very fast

transitions (typical of electrostatic discharges). Other paths are implemented through diodes:

they limit the possibility of positively differentiating AVDD and VDD (i.e. AVDD > VDD); similar

considerations are valid for AVSS and VSS due to the back-to-back diode structure imple-

mented between the two pins. Anyway, it must be highlighted that, because VSS and AVSS are

connected to the substrate of the silicon die (even though in different areas of the die itself),

they represent the reference point from which all other voltages are measured, and it is rec-

ommended to never differentiate AVSS from VSS.

Note: If more than one pair of pins for VSS and VDD is available on the device, they are con-

nected internally and the protection net diagram remains the same as shown in Figure 17..

Figure 17. Power Supply and Ground Configuration (on ST9)

VDD

VSS

AVDD

AVSS

VTEST

AN1709 Datasheet(PDF) 26 Page - STMicroelectronics