AN2857 datasheet(6/31 Pages) STMICROELECTRONICS

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Power consumption factors

AN2857

6/31

Doc ID 15241 Rev 3

Power consumption factors

In complementary metal oxide semiconductor (CMOS) digital logic devices, power

consumption is a sum of:

●

Static power (caused mainly by transistor polarization and leakage)

●

Dynamic power which depends on the supply voltage and the clock frequency through

the formula: Dynamic power = C V2 f, where:

–

C is the CMOS load capacitance

–

V is the supply voltage

–

f is the clock frequency.

Static consumption is negligible compared to dynamic consumption when the clock is

running. In some low-power modes, when no clock is running, static consumption is the

main consumption source.

Power consumption thus depends on:

●

Microcontroller unit (MCU) chip size: Technology used, number of transistors,

analog features/peripherals embedded and used.

●

MCU supply voltage: The amount of current used in CMOS logic is directly

proportional to the voltage of the power supply squared . Thus, power consumption

may be reduced by lowering the MCU supply voltage.

●

Clock frequency: Power consumption may be reduced by decreasing the clock

frequency when fast processing is not required by the application.

●

Number of active peripherals or MCU features used (CSS, BOR, PVD,...): The

greater the number of active peripherals or features, the greater the power consumed.

●

Operating mode: Power consumption varies depending on the mode a particular

application is running in (CPU on/off, oscillator on/off,...).

For an application powered by a battery, consumption is very important. Usually, average

consumption should be below a certain target to ensure an optimum battery lifetime. This

means that an application can consume more for short periods of time and keep its average

current consumption below the target.

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