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AN3960 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN3960 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 21 page ![]() Risks of ESD AN3960 6/21 Doc ID 022082 Rev 1 2.1 Simulation and testing of electronic devices using models Several models describe how to simulate an ESD stress. The schematic circuit of Figure 1, shows how to generate an ESD event to a device under test (DUT). It is the basis of these models. Figure 1. Electrostatic discharge test (ESD generator and DUT) 1. Legend: R1 = resistor 1, RD = discharge resistor, CD = discharge capacitor, HV = high voltage, and VD = discharge voltage. R1, RD, and CD are defined according to a standard. 2. The charge and discharge switches are not closed simultaneously. 2.1.1 Human body model (HBM) For testing the susceptibility of electronic devices to ESD stress from human contact, an ESD simulator with a special output circuit called the human body model (HBM) is often used. This model simulates the discharge which might occur when a human touches an electronic device (either a system or a component). The HBM consists of a capacitor in series with a resistor (see Figure 1). The capacitor is charged to a specified voltage from an external source, and then suddenly discharged through the resistor into an electronic terminal of the DUT. 2.1.2 Machine model (MM) This model simulates what happens when a machine becomes electrostatically charged and subsequently discharges into an electronic device when it comes in contact with it. The MM test circuit consists of charging up a 200 pF capacitor to a certain voltage and then discharging this capacitor directly into the DUT. |
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