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AN3960 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN3960 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 21 page ![]() Risks of ESD AN3960 8/21 Doc ID 022082 Rev 1 Figure 2. IEC61000-4-2 ESD current waveform (RD = 330 Ω/CD = 150 pF) 2.2.4 MIL-STD-883H This standard method classifies microcircuits according to their susceptibility to damage or degradation by exposure to ESD. For this standard RD is 1.5 Ωand CD is 100 pF. It is well suited for electronic device tests as ESD stress can be applied directly onto its pins. 2.2.5 ESD standard summary An application has to align with one or more standards as agreed with the customer. Table 1 summarizes the test conditions for the ESD standards. When an ESD event occurs, the standards outlined in Section 2.2 describe four test results which can occur in a real application. 120 100 80 60 53 40 27 20 0 -10 0 10 20 30 40 506070 80 90 100 Time (ns) Rise time = 0.7 ns to 1 ns ai18793 Table 1. Test conditions for ESD standards Standard Model RD CD ±VD JS-001-2010 HBM 1.5 k Ω 100 pF 8 kV SP723 EIAJ IC121 MM 0 Ω 200 pF 2 kV IEC61000-4-2 (level 4)(1) 1. Level 4 = maximum level of test voltage in the IEC61000-4-2 standard. HBM and air discharge 330 Ω 150 pF 15 kV HBM, and direct discharge 330 Ω 150 pF 8 kV MIL-STD-883H (class 3B)(2) 2. Class 3B = maximum level of test voltage in the MIL-STD-883H standard. HBM 1.5 k Ω 100 pF 8 kV |
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