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AN4457 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN4457 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 24 page ![]() UART emulator description AN4457 8/24 DocID026046 Rev 1 1.3 UART emulator principle 1.3.1 Data transmission The transmitter can send 5-, 6-, 7-, 8- or 9-bit data frames depending on user data length configuration. Figure 2 shows the waveforms of a 9-bit transmit emulation. Figure 2. 9-bit data transmission waveforms 1.3.2 Single-frame transmission The transmission sequence includes the following steps: 1. The CPU formats the frame to be sent to the memory. 2. The timer sends to the DMA a request to set GPIO to 0 (start bit). 3. The timer starts counting the start bit duration according to the defined baudrate. 4. When the bit duration has elapsed, the timer sends to the DMA a request to set the next bit from memory. Once the frame transmission is complete, the TC flag (UART transmission complete) is set. 1.3.3 Multiple-frame transmission Multiple -frame transmission is based on two buffers. When the DMA transfers the first frame into the first buffer, the CPU formats the second frame in the second buffer. After each frame transfer, the DMA TC flag must be cleared and the DMA reconfigured with the new source address (address of first or second buffer). This operation is repeated until all frames are transmitted. When this is done, the TC flag (UART transfer complete flag) is set. |
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