Peripheral migration

TN1201

6/13

DocID027299 Rev 1

3

Peripheral migration

Table 3 lists the main product peripherals and system features for both product sets. The

common peripherals are supported with the dedicated firmware library (from version 1.3.0)

without any modification. Users can change the instance and all the related features (clock

configuration, pin configuration, interrupt/DMA request).

The main peripherals changes are described in Section 3.1: Main peripherals/system

changes. The changes which are also needed in the development tools configuration are

described in Section 4: Development tool adaptations.

Table 3 presents the differences between STM32L15/6xxD and STM32L15/6xVD-X devices

regarding the peripherals and system differences, as well as the impact on the software.

Table 3. STM32L15/6xxD and STM32L15/6xVD-X device difference summary

Function

STM32L15/6xxD

STM32L15/6xVD-X

Behavior / impact to software

Core @ 32MHz

-

Max DMIPS/MHz

1.25

1.25

-

Flash [KB]

Dual bank

2 x 192 KB

Dual bank

2 x 192 KB

-

RAM [KB]

48

80

Enhancement. The application can

use larger RAM memory space.

EEPROM [KB]

Dual bank

2 x 6 KB

Dual bank

2 x 8 KB

Enhancement. The application can

use larger EEPROM memory space.

Backup registers [B]

128

128

-

Flash interface [bits]

64/32

64/32

-

Bootloader

USART/USB

USART/USB

-

DMA / channels

2 / 12ch

2 / 12ch

-

USART/UART

3 / 2

3 / 2

-

SPI / I2S

3 / 2

3 / 2

-

I2C

22

-

USB 2.0

1 x FS

1 x FS

-

LCD [seg x com]

8 x 40

8 x 40

-

LCD rails decoupling

NO

NO

-

TIMER

[32-bit/16-bit/Lite]

1/6/2

1/6/2

-

IWDG/WWDG

1/1

1/1

-

Clock

HSI/HSE/LSI/LSE

CSS on HSE/LSE

HSI/HSE/LSI/LSE

CSS on HSE/LSE

-