6

LT1641

APPLICATIO S I FOR ATIO

Hot Circuit Insertion

When circuit boards are inserted into a live backplane, the

supply bypass capacitors on the boards draw high peak

currents from the backplane power bus as they charge up.

The transient currents can permanently damage the con-

nector pins and glitch the system supply, causing other

boards in the system to reset.

The LT1641 is designed to turn on a board’s supply

voltage in a controlled manner, allowing the board to be

safely inserted or removed from a live backplane. The chip

also provides undervoltage and overcurrent protection

while a power good output signal indicates when the

output supply voltage is ready.

Power-Up Sequence

The power supply on a board is controlled by placing an

external N-channel pass transistor (Q1) in the power path

capacitor C1 provides control of the GATE slew rate.

Resistor R6 provides current control loop compensation

while R5 prevents high frequency oscillations in Q1.

Resistors R1 and R2 provide undervoltage sensing.

After the power pins first make contact, transistor Q1 is

turned off. If the voltage at the ON pin exceeds the turn-on

undervoltage lockout threshold, and the voltage on the

TIMER pin is less than 1.233V, transistor Q1 will be turned

on (Figure 6). The voltage at the GATE pin rises with a slope

equal to 10

µA/C1 and the supply inrush current is set at

be limited by the internal current limit circuitry which

adjusts the voltage on the GATE pin to maintain a constant

voltage across the sense resistor.

Once the voltage at the output has reached its final value,

as sensed by resistors R3 and R4, the PWRGD pin goes

high.

TIMER

SENSE

GATE

87

6

54

2

1

3

D1

CMPZ

5248B

GND

PWRGD

PWRGD

FB

R5

10

Ω

5%

ON

R1

49.9k

1%

24V

GND

1641 F05

R2

3.4k

1%

C2

0.68

µF

R6,

1k, 5%

0.025

Ω

C1

10nF

R3

59k

1%

R4

3.57k

1%

R7

24k

5%

+

LT1641

Q1

IRF530

FIgure 5. Typical Application

Figure 6. Power-Up Waveforms