UPD7566ACSA datasheet(13/58 Pages) NEC

13 / 58 page

µPD7566A, 7566A(A)

(4) P100 to P103(Port 10), and P110 to P113 (Port 11)..........Pseudo-bidirectional I/O

Pins P100 to P103 constitute a 4-bit I/O port with output latches, Port 10, while P110 to P113 form Port

11, which is a 4-bit I/O port with output latches.

When a port output instruction (OPL, L = 10 or L11) is executed, the accumulator contents are latched

to the output latches and, at the same time, output to either of these ports.

Data once written to the output latch and the state of the output buffer are retained until an output

instruction that manipulates Port 10 or 11 is executed next, or until the RESET signal is input. Therefore,

the states of the output latches and output buffer will not be changed, even when an input instruction is

executed to these ports.

Each bit of Ports 10 and 11 can be set or reset by SPBL or RPBL instruction. Three input modes can

be selected for Ports 10 and 11 by mask options: N-channel open-drain I/O, N-channel open-drain I/O with

pull-up resistors connected, and CMOS (push-pull) modes.

The N-channel open-drain mode is useful for interfacing a circuit operating on a supply voltage different

from that fed to the microcomputer, because the I/O buffer in this mode can withstand a 9V application.

If the CMOS (push-pull) I/O mode has been selected and an output instruction has once been executed,

the ports cannot return to the input mode. However, the pin states can be checked by executing a port

input (IPL) instruction.

In the N-channel open-drain mode, regardless of whether the pull-up resistors are connected or not,

the ports are set in the input mode, when high-level signals are output to them, and the data on the 4 bits

of each port can be loaded to the accumulator. Thus, the port serves as a pseudo-bidirectional port.

The three I/O modes are selected under the following conditions:

CMOS I/O

To use all the 4-bits as input port pins

ii)

To use port pins as output pins from which no medium-voltage output is required

N-channel open-drain I/O

To use port pins in applications where inputting outputting a medium-voltage is required

ii)

To use some port pins as input pins and the others as output pins

iii) To alternately input and output data through one port pin

N-channel open-drain I/O with pull-up resistor connected

To use some port pins as input pins and the other, as output pins in applications where pull-up

resistors are required

ii)

To alternately input and output data through one port pin in application where a pull-up resistor

is required

Caution

To use port pins as input pins in modes and above, it is necessary to write “1” to the output

latch in advance and to turn off the N-channel transistor.

UPD7566ACSA Datasheet(PDF) 13 Page - NEC