Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

M306V2EEFS Datasheet(PDF) 76 Page - Mitsubishi Electric Semiconductor

Part # M306V2EEFS
Description  SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER?
PDF  276 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M306V2EEFS Datasheet(HTML) 76 Page - Mitsubishi Electric Semiconductor

Back Button M306V2EEFS Datasheet HTML 72Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 73Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 74Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 75Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 76Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 77Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 78Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 79Page - Mitsubishi Electric Semiconductor M306V2EEFS Datasheet HTML 80Page - Mitsubishi Electric Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 76 / 276 page
background image
M306V2ME-XXXFP
M306V2EEFP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
76
Rev. 1.0
Single-chip mode
Memory expansion mode
Transfer unit
Bus width
Access address
Microprocessor mode
No. of read
No. of write
No. of read No. of write
cycles
cycles
cycles
cycles
16-bit
Even
1
1
1
1
8-bit transfers
(BYTE= “L”)
Odd
1
1
1
1
(DMBIT= “1”)
8-bit
Even
—
—
1
1
(BYTE = “H”)
Odd
—
—
1
1
16-bit
Even
1
1
1
1
16-bit transfers
(BYTE = “L”)
Odd
2
2
2
2
(DMBIT= “0”)
8-bit
Even
—
—
2
2
(BYTE = “H”)
Odd
—
—
2
2
Table 2.9.2 No. of DMAC transfer cycles
2.9.2 DMAC Transfer Cycles
Any combination of even or odd transfer read and write addresses is possible. Table 2.9.2 shows the
number of DMAC transfer cycles.
The number of DMAC transfer cycles can be calculated as follows:
No. of transfer cycles per transfer unit = No. of read cycles ! j + No. of write cycles ! k
Internal memory
External memory
Internal ROM/RAM Internal ROM/RAM SFR area
Separate bus Separate bus
Multiplex
/OSD RAM
bus
No wait
With wait
No wait
With wait
12
2
1
2
3
Coefficient j, k



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com